Small & Soft
Ultimative RISC
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URISC 1 During the VLSI­laboratory for design of semi­custom­chips at the department Entwurf integrierter Schaltungen (E.I.S.) Frank Gerberding, Marc Zimmermann and I created a single instruction processor. Its only Instruction is 'MOVE'. Since this instruction-'set' cannot be reduced any further the chip is called URISC (= ultimative reduced instruction set computer). Nevertheless, a memory-mapped ALU made this chip a complete computer: Accessing special addresses (which are mapped to/from the arithmetic logical unit) causes the ALU to run the desired calculations.

URISC 2 Ten pieces of this processor has been manufactured. One of these pieces is shown in the two pictures on this page (I scanned it directly from slides, so the quality is quite poor).

The internal calculations could have worked correctly with a clock up to 90MHz, but unfortunately the I/O-operations are to slow, so the whole processor can be run with a clock up to 50Mhz.

 
© copyright Tim Wittrock 1999
ti.wittrock@tu-bs.de